We have described and applied a technique for selection of processor cache configurations for low power using a parameter defined as a product of the cache miss rate and cache size. 1. Introduction ...

The memory hierarchy (including caches and main memory) can consume as much as 50% of an embedded system power. This power is very application dependent, and tuning caches for a given application is a ...

The year so far has been filled with news of Spectre and Meltdown. These exploits take advantage of features like speculative execution, and memory access timing. What they have in common is the fact ...

The development of caches and caching is one of the most significant events in the history of computing. Virtually every modern CPU core from ultra-low power chips like the ARM Cortex-A5 to the ...

System-on-a-Chip (SoC) designers have a problem, a big problem in fact, Random Access Memory (RAM) is slow, too slow, it just can’t keep up. So they came up with a workaround and it is called cache ...

Editor's Note: This is part 2 of a four-part series. In part 1, we showed how to do efficient 4×4 complex matrix inversion on the StarCore SC3850. The newly released Freescale SC3850 StarCore DSP ...